1. Field of the Invention
The present invention relates to a semiconductor package, and more particularly, to a quad flat non-leaded package.
2. Description of the Related Art
FIG. 1 shows a cross sectional view of a conventional quad flat non-leaded package. The conventional quad flat non-leaded package 10 comprises a lead frame 11, a semiconductor chip 12, a plurality of bonding wires 13 and a molding compound 14.
The lead frame 11 has a plurality of leads 111, a die pad 112 and a plurality of supporting bars (not shown). The die pad 112 has a top surface 1121 and a bottom surface 1122 being opposite to the top surface 1121. The supporting bars are used for supporting the die pad 112. The leads 111 are disposed at the periphery of the die pad 112. In order to facilitate wire bonding, prevent introduction of moisture into the molded package and enhance the engagement between the leads 111 and the molding compound 14, each of the leads 111 is designed to be in a stepped configuration. Thus, each of the leads 111 comprises a top surface 1111, a bottom surface 1112 and a relative thin bonding area 1113, wherein the bottom surface 1112 of the leads 111 and the bottom surface 1122 of the die pad 112 are on the same plane, and the top surfaces 1111 of the leads 111 and the top surfaces of the die pads 112 and the supporting bars are on the same plane. The bonding area 1113 is used for wire bonding by the bonding wire 13.
The semiconductor chip 12 has an active surface 121 and a back surface 122 being opposite to the active surface 121, wherein the active surface 121 has a plurality of bonding pads 123 thereon. The area of the semiconductor chip 12 is larger than that of the die pad 112 and therefore, after the active surface 121 is attached onto the top surface 1121 of the die pad 112 by utilizing an adhesive material 15 with high thermal conductivity, the bonding pads 123 are exposed.
The bonding wires 13, for example, gold wires or aluminum, are used for electrically coupling the bonding pads 123 to the bonding areas 1113 of the leads 111.
The molding compound 14 encapsulates the lead frame 11, the semiconductor chip 12 and the bonding wires 13, wherein the bottom surfaces 1112 and side surfaces of the leads 111 of the lead frame 11 are exposed to the outside of the molding compound 14 so as to be electrically connected to an external device. Additionally, the bottom surface 1122 of the die pad 112 is also exposed to the outside of the molding compound 14 so as to increase heat-dissipating efficiency.
A shortcoming of the conventional quad flat non-leaded package 10 is that when the semiconductor chip 12 becomes larger, the supporting area of the die pad 112 to the semiconductor chip 12 is not large enough to support the semiconductor chip 12. Therefore, the circumference of the active surface 121 of the semiconductor chip 12 is suspended. As a result, the semiconductor chip 12 may break or shift during wire bonding procedure, which causes packaging failure.
Consequently, there is an existing need for a novel and improved quad flat non-leaded package to solve the above-mentioned problem.